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| TSM1N60S N-Channel Power Enhancement Mode MOSFET Pin assignment: 1. Gate 2. Drain 3. Source VDS = 600V ID = 0.3A RDS (on), Vgs @ 10V, Ids @ 0.3A = 11 General Description The TSM1N60s is used an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced MOSFET is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain- to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies and converters, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and safety margin against unexpected voltage transients. Features Robust high voltage termination Avalanche energy specified Diode is characterized for use in bridge circuits Source to Drain diode recovery time comparable to a discrete fast recovery diode. IDSS and VDS(on) specified at elevated temperature Block Diagram Ordering Information Part No. TSM1N60SCT B0 TSM1N60SCT A3 Packing Bulk Pack Ammo Pack Package TO-92 TO-92 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Maximum Power Dissipation Operating Junction Temperature Operating Junction and Storage Temperature Range Single Pulse Drain to Source Avalanche Energy (VDD = 50V, VGS=10V, IAS=0.3A, L=115mH) Ta = 25 oC o Ta > 25 C Symbol VDS VGS ID IDM PD TJ TJ, TSTG EAS Limit 600V 30 0.3 1.2 3 0.025 +150 - 55 to +150 50 Unit V V A A W o W/ C o o C C mJ Thermal Performance Parameter Lead Temperature (1/8" from case) Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t<=10sec. Symbol TL Rja Limit 10 50 Unit S o C/W TSM1N60S 1-4 2006/01 rev. A Electrical Characteristics Tj = 25 oC, unless otherwise noted Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Transconductance Conditions Symbol Min Typ Max Unit VGS = 0V, ID = 250uA VGS = 10V, ID = 0.3A VDS = VGS, ID = 250uA VDS = 600V, VGS = 0V VGS = 30V, VDS = 0V VDS 50V, ID = 0.3A BVDSS RDS(ON) VGS(TH) IDSS IGSS gfs 600 -2.0 ---- -11 ---5 -13 4.0 10 100 -- V V uA nA S Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, VGS = 0V, f = 1.0MHz VDD = 300V, ID = 0.3A, VGEN = 10V, RG = 4.7 VDS = 480V, ID = 0.3A, VGS = 10V Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss ----------4.5 1.1 2.0 10 20 25 24 155 20 3 6.0 --30 50 45 60 200 26 4 pF nS nC Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = 0.3A, VGS = 0V Note: 1. pulse test: pulse width <=300uS, duty cycle <=2% 2. Negligible, Dominated by circuit inductance. IS VSD ----0.3 1.4 A V TSM1N60S 2-4 2006/01 rev. A Typical Characteristics Curve (Ta = 25 oC unless otherwise noted) TSM1N60S 3-4 2006/01 rev. A TO-92 Mechanical Drawing A DIM TO-92 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 4.30 4.70 0.169 0.185 4.30 4.70 0.169 0.185 14.30(typ) 0.563(typ) 0.43 0.49 0.017 0.019 2.19 2.81 0.086 0.111 3.30 3.70 0.130 0.146 2.42 0.37 2.66 0.43 0.095 0.015 0.105 0.017 B A B C D E F C E F G H H D G TSM1N60S 4-4 2006/01 rev. A |
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